The present invention relates generally to data processing systems, and more particularly to techniques for forming a linked list queue using a chunk-based structure.
As is known, in a router or other type of packet switch of a packet processing system, packets that pass through and/or are processed by the router are maintained, at least temporarily, in a packet buffer memory. Typically, a memory data structure known as a linked list queue is maintained in association with the packet buffer memory. A linked list queue contains a list of pointers respectively pointing to each memory location in the packet buffer memory in which data associated with each packet is stored.
A conventional queue structure typically stores, in one continuous, sequential list, each pointer associated with each packet that is currently stored in the packet buffer memory. Each pointer in the list, however, may be stored at non-contiguous memory locations of the memory in which the queue resides. When a packet from the packet buffer memory is to be processed in some operation performed by the router, the link list queue must be accessed or addressed such that the pointer associated with that packet is obtained. Thus, with the conventional linked list structure, queue accessing must be done each and every time a pointer needs to be obtained and a packet is to be processed.
However, as processing speeds associated with routers or other packet switches increase (e.g., 10 gigabits per second and faster), the input and output bandwidth and access latency associated with the memory used to maintain the linked list queue becomes critical. That is, given the fact that a conventional queue must be accessed each and every time a packet pointer is needed, the queue memory can become a significant bottleneck.
It is therefore apparent that a need exists for techniques which address these and other drawbacks associated with the use of a single, non-contiguous linked list queue in data processing systems.
The present invention provides techniques for forming a linked list queue using a multiple memory chunk-based or block-based structure thereby addressing the drawbacks associated with the use of conventional linked list queues in data processing systems.
In one aspect of the invention, a processing system comprises processing circuitry and memory circuitry coupled to the processing circuitry. The memory circuitry is configurable to maintain at least one queue structure representing a list of data units (e.g., pointers to packets stored in a packet memory). The queue structure is partitioned into two or more blocks (e.g., chunks) wherein at least some of the blocks of the queue structure include two or more data units. Further, at least some of the blocks of the queue structure may include a pointer to a next block of the queue structure (e.g., a next chunk pointer).
Given such a queue structure, the processing circuitry is configurable to address or access a first block of the queue structure, and then address a next block of the queue structure by setting the next block pointer of the first block to point to the next block.
Advantageously, since the data units in a given block are contiguously located in memory (while each block does not necessarily have to be), the processing circuitry has only to address the block in order to effectively address each data unit in that block. Thus, in the case where the data units are packet pointers, the queue structure need not be accessed each and every time a pointer needs to be obtained and a packet is to be processed, as with a conventional queue structure. Rather, the queue structure of the invention need only be accessed when pointers in a next block are required. This is accomplished by setting the next block pointer of the current block to point to the next block. Such a queue accessing technique significantly reduces the bandwidth and access latency requirements of the queue memory and also prevents the queue memory from becoming a bottleneck in processing operations.
In another aspect of the invention, at least one list of pointers representing available blocks of the queue structure (e.g., a free chunk list) is maintained. In this manner, the available blocks list is referenced when adding a data unit (e.g., packet pointer) to the queue structure, and is updated when removing a data unit from the queue structure and/or releasing a block. In one embodiment, two separate available blocks lists are used in tandem to increase the speed with which available blocks of the queue structure are identified and accessed.
In an illustrative embodiment, the queue structure of the invention may be associated with a traffic manager of a router or other type of packet switch.: Further, the processing circuitry and the memory circuitry used to maintain and access the inventive block-based queue structure may be implemented on one or more integrated circuits.